1. Field of the Invention
The present invention relates to a semiconductor device and a manufacturing method thereof
2. Description of the Related Art
As for a semiconductor integrated circuit that is expected to be further downsized and thinned, it is important to increase the strength of the semiconductor integrated circuit against external stress.
A prepreg is known, in which a combination of an organic resin and a sheet-like fiber body, for example glass cloth, is used (see Patent Document 1: Japanese Published Patent Application No. 2002-198658).
A multilayer semiconductor integrated circuit enables higher integration without increasing the area.
By using a prepreg, which is strong enough to be used as a protection material, semiconductor element layers in a semiconductor integrated circuit can be prevented from being physically broken even when such a highly integrated semiconductor integrated circuit is manufactured.
However, in the case where a semiconductor integrated circuit has still more layers, it is necessary to manufacture a wiring which electrically connects a plurality of semiconductor integrated circuits. For this, a through-hole penetrating the inside of the prepreg has to be made in order to form a wiring in the through-hole.
Forming the through-hole in the prepreg means that a fiber body is damaged; that is, there is a possibility that the strength of the prepreg is reduced.
Further, the number of manufacturing steps is increased because a hole has to be made in either the fiber body or the organic resin.
Furthermore, when semiconductor integrated circuits each covered with a prepreg are superposed on one another in order to achieve high integration, bending or warpage may occur because the semiconductor integrated circuit covered with a prepreg is soft. Therefore, there is a possibility that it is difficult to perform alignment for bonding the semiconductor integrated circuits.